SiC, having a wide bandgap and a maximum dielectric field greater by about one order of magnitude than that of silicon (Si), is a promising material expected to be applied to next-generation power semiconductor devices. SiC has so far found application to various electronic devices through use of single crystal wafers of 4H—SiC or 6H—SiC, and is considered to be particularly suitable for high-temperature, high-power devices. The above-mentioned crystal is alpha-phase SiC with a zinc-blende structure and a wurtzite structure stacked one upon the other. Prototypes of other semiconductor devices are being fabricated from a beta-phase SiC crystal of 3C—SiC. Recently, prototypes of Schottky diodes, MOSFETs (metal oxide semiconductor field-effect transistors), thyristors and the like have been fabricated as power devices. It has been confirmed that such devices have properties much more favorable than those of conventional Si semiconductor devices.
In a semiconductor device through use of SiC, particularly in a MOSFET having a channel formed at the surface of a SiC substrate, the surface obtained by high-temperature annealing has been conventionally used for the channel. However, the surface of the SiC substrate obtained by high-temperature annealing has random irregularities, which increases the interface state density. The carrier mobility is thereby reduced, resulting in degraded properties of the semiconductor device.
A technique that may solve the problem is disclosed in, for example, Japanese Patent Laying-Open No. 2006-344942 (Patent Document 1). Patent Document 1 discloses forming two trenches at the surface of a SiC film, and then heat-treating the SiC film with silicon (Si) supplied to the surface of the SiC film. As a result, a facet (macrostep) whose length of one cycle is 100 nm or more is formed between the trenches. A terrace of the macrostep constitutes a channel of a MOSFET.    Patent Document 1: Japanese Patent Laying-Open No. 2006-344942